Università degli Studi di Cagliari
Marco Desogus
All-Spiking ECG Analysis for Arrhythmia Classification on Low-Power FPGA
2026-01-01 Scrugli, Matteo Antonio; Leone, Gianluca; Busia, Paola; Raffo, Luigi; Meloni, Paolo
Endoscopy Image Classification for Wireless Capsules with CNNs on Microcontroller-Based Platforms
2025-01-01 Busia, Paola; Pinna, Andrea; Meloni, Paolo
ESTU: Enabling Spiking Transformers on Ultra-Low-Power FPGAs
2025-01-01 Leone, Gianluca; Busia, Paola; Orrù, Mauro; Raffo, Luigi; Meloni, Paolo
Wearable epilepsy seizure detection on FPGA with spiking neural networks
2025-01-01 Busia, Paola; Leone, Gianluca; Matticola, Andrea; Raffo, Luigi; Meloni, Paolo
On-FPGA Spiking Neural Networks for Integrated Near-Sensor ECG Analysis
2024-01-01 Scrugli, Matteo Antonio; Busia, Paola; Leone, Gianluca; Meloni, Paolo
SYNtzulu: A Tiny RISC-V-Controlled SNN Processor for Real-Time Sensor Data Analysis on Low-Power FPGAs
2024-01-01 Leone, G.; Scrugli, M. A.; Badas, L.; Martis, L.; Raffo, L.; Meloni, P.
A tiny transformer for low-power arrhythmia classification on microcontrollers
2024-01-01 Busia, Paola; Scrugli, Matteo Antonio; Jung, Victor Jean-Baptiste; Benini, Luca; Meloni, Paolo
Reducing False Alarms in Wearable Seizure Detection with EEGformer: A Compact Transformer Model for MCUs
2024-01-01 Busia, Paola; Cossettini, Andrea; Ingolfsson, Thorir M.; Benatti, Simone; Burrello, Alessio; Jung, Victor J. B.; Scherer, Moritz; Scrugli, Matteo A.; Bernini, Adriano; Ducouret, Pauline; Ryvlin, Philippe; Meloni, Paolo; Benini, Luca
Real-Time sEMG Processing with Spiking Neural Networks on a Low-Power 5K-LUT FPGA
2024-01-01 Scrugli, Matteo Antonio; Leone, Gianluca; Busia, Paola; Raffo, Luigi; Meloni, Paolo
sEMG-based gesture recognition with spiking neural networks on low-power FPGA
2024-01-01 Scrugli, Matteo Antonio; Leone, Gianluca; Busia, Paola; Meloni, Paolo
Low-Power FPGA-based Spiking Neural Networks for Real-Time Decoding of Intracortical Neural Activity
2024-01-01 Martis, Luca; Leone, Gianluca; Raffo, Luigi; Meloni, Paolo
Exploiting FPGAs and spiking neural networks at the micro-Edge: the EdgeAI approach
2024-01-01 Meloni, Paolo; Busia, Paola; Leone, Gianluca; Martis, Luca; Scrugli, Matteo A.
Design of an AI-driven Architecture with Cobots for Digital Transformation to Enhance Quality Control in the Food Industry
2024-01-01 Busia, P.; Marche, C.; Meloni, P.; Reforgiato Recupero, D.
On-FPGA Spiking Neural Networks for End-to-End Neural Decoding
2023-01-01 Leone, G; Raffo, L; Meloni, P
An Automated Design Flow for Adaptive Neural Network Hardware Accelerators
2023-01-01 Ratto, F.; Mainez, A. P.; Sau, C.; Meloni, P.; Deriu, G.; Delucchi, S.; Massa, M.; Raffo, L.; Palumbo, F.
An Adaptable Cognitive Microcontroller Node for Fitness Activity Recognition
2022-01-01 Scrugli, M. A.; Blazica, B.; Meloni, P.
EEGformer: Transformer-Based Epilepsy Detection on Raw EEG Traces for Low-Channel-Count Wearable Continuous Monitoring Devices
2022-01-01 Busia, Paola; Cossettini, Andrea; Ingolfsson, Thorir Mar; Benatti, Simone; Burrello, Alessio; Scherer, Moritz; Scrugli, Matteo Antonio; Meloni, Paolo; Benini, Luca
Target-Aware Neural Architecture Search and Deployment for Keyword Spotting
2022-01-01 Busia, P.; Deriu, G.; Rinelli, L.; Chesta, C.; Raffo, L.; Meloni, P.
An Adaptive Cognitive Sensor Node for ECG Monitoring in the Internet of Medical Things
2022-01-01 Scrugli, M. A.; Loi, D.; Raffo, L.; Meloni, P.
A Bandwidth-Efficient Emulator of Biologically-Relevant Spiking Neural Networks on FPGA
2022-01-01 Leone, G; Raffo, L; Meloni, P
Dynamic Pruning for Parsimonious CNN Inference on Embedded Systems
2022-01-01 Busia, P.; Theodorakopoulos, I.; Pothos, V.; Fragoulis, N.; Meloni, P.
Runtime adaptive iomt node on multi-core processor platform
2021-01-01 Scrugli, M. A.; Meloni, P.; Sau, C.; Raffo, L.
ALOHA: A Unified Platform-Aware Evaluation Method for CNNs Execution on Heterogeneous Systems at the Edge
2021-01-01 Busia, Paola; Minakova, Svetlana; Stefanov, Todor; Raffo, Luigi; Meloni, Paolo
Task-Specific Automation in Deep Learning Processes
2021-01-01 Buchgeher, G.; Czech, G.; Ribeiro, A. S.; Kloihofer, W.; Meloni, P.; Busia, P.; Deriu, G.; Pintor, M.; Biggio, B.; Chesta, C.; Rinelli, L.; Solans, D.; Portela, M.
Optimizing Temporal Convolutional Network Inference on FPGA-Based Accelerators
2020-01-01 Carreras, M.; Deriu, G.; Raffo, L.; Benini, L.; Meloni, P.
ZyON: Enabling Spike Sorting on APSoC-Based Signal Processors for High-Density Microelectrode Arrays
2020-01-01 Leone, G.; Raffo, L.; Meloni, P.
Exploring NEURAghe: A Customizable Template for APSoC-Based CNN Inference at the Edge
2020-01-01 Meloni, P.; Loi, D.; Deriu, G.; Carreras, M.; Conti, F.; Capotondi, A.; Rossi, D.
Runtime-adaptive cognitive IoT nodes
2019-01-01 Scrugli, M. A.; Loi, D.; Raffo, L.; Meloni, P.
Sustainable water management in quality wine-making
2019-01-01 Soccol, M.; Perra, A.; Loddo, S.; Meloni, P.; Barbaro, M.; Cascio, M. L.; Sirca, C.
Flexible acceleration of convolutions on FPGAs: Planning NEURAghe 2.0
2019-01-01 Carreras, M.; Deriu, G.; Meloni, P.
Optimization and deployment of CNNs at the Edge: The ALOHA experience
2019-01-01 Meloni, P.; Loi, D.; Busia, P.; Deriu, G.; Pimentel, A. D.; Sapra, D.; Stefanov, T.; Minakova, S.; Conti, F.; Benini, L.; Pintor, M.; Biggio, B.; Moser, B.; Shepelev, N.; Fragoulis, N.; Theodorakopoulos, I.; Masin, M.; Palumbo, F.
Architecture-aware design and implementation of CNN algorithms for embedded inference: The ALOHA project
2018-01-01 Meloni, P.; Loi, D.; Deriu, G.; Pimentel, A. D.; Saprat, D.; Pintor, M.; Biggio, B.; Ripolles, O.; Solans, D.; Conti, F.; Benini, L.; Stefanov, T.; Minakova, S.; Moser, B.; Shepeleva, N.; Masin, M.; Palumbo, F.; Fragoulis, N.; Theodorakopoulos, I.
ALOHA: An architectural-aware framework for deep learning at the edge
2018-01-01 Meloni, P.; Loi, D.; Deriu, G.; Ripolles, O.; Solans, D.; Pimentel, A. D.; Sapra, D.; Pintor, Maura; Biggio, B.; Moser, B.; Shepeleva, N.; Stefanov, T.; Minakova, S.; Conti, F.; Benini, L.; Fragoulis, N.; Theodorakopoulos, I.; Masin, M.; Palumbo, F.
Neuraghe: exploiting CPU-FPGA synergies for efficient and flexible CNN inference acceleration on zynQ SoCs
2018-01-01 Meloni, Paolo; Capotondi, Alessandro; Deriu, Gianfranco; Brian, Michele; Conti, Francesco; Rossi, Davide; Raffo, Luigi; Benini, Luca
Exploiting All Programmable SoCs in Neural Signal Analysis: A Closed-Loop Control for Large-Scale CMOS Multielectrode Arrays
2018-01-01 Seu, Giovanni Pietro; Angotzi, Gian Nicola; Boi, Fabio; Raffo, Luigi; Berdondini, Luca; Meloni, Paolo
On-FPGA real-time processing of biological signals from high-density MEAs: A design space exploration
2017-01-01 Seu, Giovanni Pietro; Angotzi, Gian Nicola; Tuveri, Giuseppe; Raffo, Luigi; Berdondini, Luca; Maccione, Alessandro; Meloni, Paolo
Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs
2017-01-01 Meloni, Paolo; Rubattu, Claudio; Tuveri, Giuseppe; Pani, Danilo; Raffo, Luigi; Palumbo, Francesca
Power-Awarness in Coarse-Grained Reconfigurable Multi-Functional Architectures: a Dataflow Based Strategy
2017-01-01 Palumbo, Francesca; Fanni, Tiziana; Sau, Carlo; Meloni, Paolo
Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs
2017-01-01 Meloni, P.; Rubattu, C.; Tuveri, G.; Pani, D.; Raffo, L.; Palumbo, F.
Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing
2017-01-01 Sau, Carlo; Palumbo, Francesca; Pelcat, M; Heulot, J; Nogues, E; Menard, D; Meloni, Paolo; Raffo, Luigi
An FPGA platform for real-time simulation of spiking neuronal networks
2017-01-01 Pani, Danilo; Meloni, Paolo; Tuveri, Giuseppe; Palumbo, Francesca; Massobrio, Paolo; Raffo, Luigi
Power and clock gating modelling in coarse grained reconfigurable systems
2016-01-01 Fanni, Tiziana; Sau, Carlo; Meloni, Paolo; Raffo, Luigi; Palumbo, Francesca
A high-efficiency runtime reconfigurable IP for CNN acceleration on a mid-range all-programmable SoC
2016-01-01 Meloni, Paolo; Deriu, Gianfranco; Conti, Francesco; Loi, Igor; Raffo, Luigi; Benini, Luca
Runtime Energy versus Quality Tuning in Motion Compensation Filters for HEVC
2016-01-01 Palumbo, Francesca; Sau, Carlo; Evangelista, Davide; Meloni, Paolo; Pelcat, Maxime; Raffo, Luigi
Curbing the roofline: A scalable and flexible architecture for CNNs on FPGA
2016-01-01 Meloni, Paolo; Deriu, Gianfranco; Conti, Francesco; Loi, Igor; Raffo, Luigi; Benini, Luca
Automated Design Flow for Multi-Functional Dataflow-Based Platforms
2016-01-01 Sau, Carlo; Meloni, Paolo; Raffo, Luigi; Palumbo, Francesca; Bezati, E; Casale Brunet, S; Mattavelli, M.
Real-time neural signals decoding onto off-the-shelf DSP processors for neuroprosthetic applications
2016-01-01 Pani, Danilo; Barabino, Gianluca; Citi, Luca; Meloni, Paolo; Raspopovic, Stanisa; Micera, Silvestro; Raffo, Luigi
MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation
2016-01-01 Meloni, Paolo; Palumbo, Francesca; Rubattu, Claudio; Tuveri, Giuseppe; Pani, Danilo; Raffo, Luigi
On-the-fly adaptivity for process networks over shared-memory platforms
2016-01-01 Tuveri, Giuseppe; Meloni, Paolo; Palumbo, Francesca; Pietro Seu, Giovanni; Loi, Igor; Conti, Francesco; Raffo, Luigi
SS-design: Dataflow-based design of coarse-grained: Reconfigurable platforms reconfigurable platform composer tool project - Extended abstract
2016-01-01 Palumbo, Francesca; Sau, Carlo; Fanni, Tiziana; Meloni, Paolo; Raffo, Luigi
| Titolo | Data di pubblicazione | Autore(i) | Rivista | Editore |
|---|---|---|---|---|
| All-Spiking ECG Analysis for Arrhythmia Classification on Low-Power FPGA | 1-gen-2026 | Scrugli, Matteo Antonio; Leone, Gianluca; Busia, Paola; Raffo, Luigi; Meloni, Paolo | IEEE SENSORS JOURNAL | - |
| Endoscopy Image Classification for Wireless Capsules with CNNs on Microcontroller-Based Platforms | 1-gen-2025 | Busia, Paola; Pinna, Andrea; Meloni, Paolo | - | Springer Science and Business Media Deutschland GmbH |
| ESTU: Enabling Spiking Transformers on Ultra-Low-Power FPGAs | 1-gen-2025 | Leone, Gianluca; Busia, Paola; Orrù, Mauro; Raffo, Luigi; Meloni, Paolo | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS | - |
| Wearable epilepsy seizure detection on FPGA with spiking neural networks | 1-gen-2025 | Busia, Paola; Leone, Gianluca; Matticola, Andrea; Raffo, Luigi; Meloni, Paolo | IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS | - |
| On-FPGA Spiking Neural Networks for Integrated Near-Sensor ECG Analysis | 1-gen-2024 | Scrugli, Matteo Antonio; Busia, Paola; Leone, Gianluca; Meloni, Paolo | - | - |
| SYNtzulu: A Tiny RISC-V-Controlled SNN Processor for Real-Time Sensor Data Analysis on Low-Power FPGAs | 1-gen-2024 | Leone, G.; Scrugli, M. A.; Badas, L.; Martis, L.; Raffo, L.; Meloni, P. | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS | - |
| A tiny transformer for low-power arrhythmia classification on microcontrollers | 1-gen-2024 | Busia, Paola; Scrugli, Matteo Antonio; Jung, Victor Jean-Baptiste; Benini, Luca; Meloni, Paolo | IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS | - |
| Reducing False Alarms in Wearable Seizure Detection with EEGformer: A Compact Transformer Model for MCUs | 1-gen-2024 | Busia, Paola; Cossettini, Andrea; Ingolfsson, Thorir M.; Benatti, Simone; Burrello, Alessio; Jung, Victor J. B.; Scherer, Moritz; Scrugli, Matteo A.; Bernini, Adriano; Ducouret, Pauline; Ryvlin, Philippe; Meloni, Paolo; Benini, Luca | IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS | - |
| Real-Time sEMG Processing with Spiking Neural Networks on a Low-Power 5K-LUT FPGA | 1-gen-2024 | Scrugli, Matteo Antonio; Leone, Gianluca; Busia, Paola; Raffo, Luigi; Meloni, Paolo | IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS | - |
| sEMG-based gesture recognition with spiking neural networks on low-power FPGA | 1-gen-2024 | Scrugli, Matteo Antonio; Leone, Gianluca; Busia, Paola; Meloni, Paolo | - | Springer |
| Low-Power FPGA-based Spiking Neural Networks for Real-Time Decoding of Intracortical Neural Activity | 1-gen-2024 | Martis, Luca; Leone, Gianluca; Raffo, Luigi; Meloni, Paolo | IEEE SENSORS JOURNAL | - |
| Exploiting FPGAs and spiking neural networks at the micro-Edge: the EdgeAI approach | 1-gen-2024 | Meloni, Paolo; Busia, Paola; Leone, Gianluca; Martis, Luca; Scrugli, Matteo A. | - | Springer |
| Design of an AI-driven Architecture with Cobots for Digital Transformation to Enhance Quality Control in the Food Industry | 1-gen-2024 | Busia, P.; Marche, C.; Meloni, P.; Reforgiato Recupero, D. | - | Association for Computing Machinery |
| On-FPGA Spiking Neural Networks for End-to-End Neural Decoding | 1-gen-2023 | Leone, G; Raffo, L; Meloni, P | IEEE ACCESS | - |
| An Automated Design Flow for Adaptive Neural Network Hardware Accelerators | 1-gen-2023 | Ratto, F.; Mainez, A. P.; Sau, C.; Meloni, P.; Deriu, G.; Delucchi, S.; Massa, M.; Raffo, L.; Palumbo, F. | JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL, IMAGE, AND VIDEO TECHNOLOGY | - |
| An Adaptable Cognitive Microcontroller Node for Fitness Activity Recognition | 1-gen-2022 | Scrugli, M. A.; Blazica, B.; Meloni, P. | - | Springer |
| EEGformer: Transformer-Based Epilepsy Detection on Raw EEG Traces for Low-Channel-Count Wearable Continuous Monitoring Devices | 1-gen-2022 | Busia, Paola; Cossettini, Andrea; Ingolfsson, Thorir Mar; Benatti, Simone; Burrello, Alessio; Scherer, Moritz; Scrugli, Matteo Antonio; Meloni, Paolo; Benini, Luca | - | Institute of Electrical and Electronics Engineers Inc. |
| Target-Aware Neural Architecture Search and Deployment for Keyword Spotting | 1-gen-2022 | Busia, P.; Deriu, G.; Rinelli, L.; Chesta, C.; Raffo, L.; Meloni, P. | IEEE ACCESS | - |
| An Adaptive Cognitive Sensor Node for ECG Monitoring in the Internet of Medical Things | 1-gen-2022 | Scrugli, M. A.; Loi, D.; Raffo, L.; Meloni, P. | IEEE ACCESS | - |
| A Bandwidth-Efficient Emulator of Biologically-Relevant Spiking Neural Networks on FPGA | 1-gen-2022 | Leone, G; Raffo, L; Meloni, P | IEEE ACCESS | - |
| Dynamic Pruning for Parsimonious CNN Inference on Embedded Systems | 1-gen-2022 | Busia, P.; Theodorakopoulos, I.; Pothos, V.; Fragoulis, N.; Meloni, P. | - | Springer |
| Runtime adaptive iomt node on multi-core processor platform | 1-gen-2021 | Scrugli, M. A.; Meloni, P.; Sau, C.; Raffo, L. | ELECTRONICS | - |
| ALOHA: A Unified Platform-Aware Evaluation Method for CNNs Execution on Heterogeneous Systems at the Edge | 1-gen-2021 | Busia, Paola; Minakova, Svetlana; Stefanov, Todor; Raffo, Luigi; Meloni, Paolo | IEEE ACCESS | - |
| Task-Specific Automation in Deep Learning Processes | 1-gen-2021 | Buchgeher, G.; Czech, G.; Ribeiro, A. S.; Kloihofer, W.; Meloni, P.; Busia, P.; Deriu, G.; Pintor, M.; Biggio, B.; Chesta, C.; Rinelli, L.; Solans, D.; Portela, M. | - | Springer Science and Business Media Deutschland GmbH |
| Optimizing Temporal Convolutional Network Inference on FPGA-Based Accelerators | 1-gen-2020 | Carreras, M.; Deriu, G.; Raffo, L.; Benini, L.; Meloni, P. | IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS | - |
| ZyON: Enabling Spike Sorting on APSoC-Based Signal Processors for High-Density Microelectrode Arrays | 1-gen-2020 | Leone, G.; Raffo, L.; Meloni, P. | IEEE ACCESS | - |
| Exploring NEURAghe: A Customizable Template for APSoC-Based CNN Inference at the Edge | 1-gen-2020 | Meloni, P.; Loi, D.; Deriu, G.; Carreras, M.; Conti, F.; Capotondi, A.; Rossi, D. | IEEE EMBEDDED SYSTEMS LETTERS | - |
| Runtime-adaptive cognitive IoT nodes | 1-gen-2019 | Scrugli, M. A.; Loi, D.; Raffo, L.; Meloni, P. | - | CEUR-WS |
| Sustainable water management in quality wine-making | 1-gen-2019 | Soccol, M.; Perra, A.; Loddo, S.; Meloni, P.; Barbaro, M.; Cascio, M. L.; Sirca, C. | - | Institute of Electrical and Electronics Engineers Inc. |
| Flexible acceleration of convolutions on FPGAs: Planning NEURAghe 2.0 | 1-gen-2019 | Carreras, M.; Deriu, G.; Meloni, P. | - | CEUR-WS |
| Optimization and deployment of CNNs at the Edge: The ALOHA experience | 1-gen-2019 | Meloni, P.; Loi, D.; Busia, P.; Deriu, G.; Pimentel, A. D.; Sapra, D.; Stefanov, T.; Minakova, S.; Conti, F.; Benini, L.; Pintor, M.; Biggio, B.; Moser, B.; Shepelev, N.; Fragoulis, N.; Theodorakopoulos, I.; Masin, M.; Palumbo, F. | - | Association for Computing Machinery, Inc |
| Architecture-aware design and implementation of CNN algorithms for embedded inference: The ALOHA project | 1-gen-2018 | Meloni, P.; Loi, D.; Deriu, G.; Pimentel, A. D.; Saprat, D.; Pintor, M.; Biggio, B.; Ripolles, O.; Solans, D.; Conti, F.; Benini, L.; Stefanov, T.; Minakova, S.; Moser, B.; Shepeleva, N.; Masin, M.; Palumbo, F.; Fragoulis, N.; Theodorakopoulos, I. | - | Institute of Electrical and Electronics Engineers Inc. |
| ALOHA: An architectural-aware framework for deep learning at the edge | 1-gen-2018 | Meloni, P.; Loi, D.; Deriu, G.; Ripolles, O.; Solans, D.; Pimentel, A. D.; Sapra, D.; Pintor, Maura; Biggio, B.; Moser, B.; Shepeleva, N.; Stefanov, T.; Minakova, S.; Conti, F.; Benini, L.; Fragoulis, N.; Theodorakopoulos, I.; Masin, M.; Palumbo, F. | - | Association for Computing Machinery |
| Neuraghe: exploiting CPU-FPGA synergies for efficient and flexible CNN inference acceleration on zynQ SoCs | 1-gen-2018 | Meloni, Paolo; Capotondi, Alessandro; Deriu, Gianfranco; Brian, Michele; Conti, Francesco; Rossi, Davide; Raffo, Luigi; Benini, Luca | ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS | - |
| Exploiting All Programmable SoCs in Neural Signal Analysis: A Closed-Loop Control for Large-Scale CMOS Multielectrode Arrays | 1-gen-2018 | Seu, Giovanni Pietro; Angotzi, Gian Nicola; Boi, Fabio; Raffo, Luigi; Berdondini, Luca; Meloni, Paolo | IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS | - |
| On-FPGA real-time processing of biological signals from high-density MEAs: A design space exploration | 1-gen-2017 | Seu, Giovanni Pietro; Angotzi, Gian Nicola; Tuveri, Giuseppe; Raffo, Luigi; Berdondini, Luca; Maccione, Alessandro; Meloni, Paolo | - | Institute of Electrical and Electronics Engineers Inc. |
| Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs | 1-gen-2017 | Meloni, Paolo; Rubattu, Claudio; Tuveri, Giuseppe; Pani, Danilo; Raffo, Luigi; Palumbo, Francesca | JOURNAL OF SYSTEMS ARCHITECTURE | - |
| Power-Awarness in Coarse-Grained Reconfigurable Multi-Functional Architectures: a Dataflow Based Strategy | 1-gen-2017 | Palumbo, Francesca; Fanni, Tiziana; Sau, Carlo; Meloni, Paolo | JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL, IMAGE, AND VIDEO TECHNOLOGY | - |
| Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs | 1-gen-2017 | Meloni, P.; Rubattu, C.; Tuveri, G.; Pani, D.; Raffo, L.; Palumbo, F. | JOURNAL OF SYSTEMS ARCHITECTURE | - |
| Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing | 1-gen-2017 | Sau, Carlo; Palumbo, Francesca; Pelcat, M; Heulot, J; Nogues, E; Menard, D; Meloni, Paolo; Raffo, Luigi | IEEE EMBEDDED SYSTEMS LETTERS | - |
| An FPGA platform for real-time simulation of spiking neuronal networks | 1-gen-2017 | Pani, Danilo; Meloni, Paolo; Tuveri, Giuseppe; Palumbo, Francesca; Massobrio, Paolo; Raffo, Luigi | FRONTIERS IN NEUROSCIENCE | - |
| Power and clock gating modelling in coarse grained reconfigurable systems | 1-gen-2016 | Fanni, Tiziana; Sau, Carlo; Meloni, Paolo; Raffo, Luigi; Palumbo, Francesca | - | ACM |
| A high-efficiency runtime reconfigurable IP for CNN acceleration on a mid-range all-programmable SoC | 1-gen-2016 | Meloni, Paolo; Deriu, Gianfranco; Conti, Francesco; Loi, Igor; Raffo, Luigi; Benini, Luca | - | Institute of Electrical and Electronics Engineers |
| Runtime Energy versus Quality Tuning in Motion Compensation Filters for HEVC | 1-gen-2016 | Palumbo, Francesca; Sau, Carlo; Evangelista, Davide; Meloni, Paolo; Pelcat, Maxime; Raffo, Luigi | - | Elsevier B.V. |
| Curbing the roofline: A scalable and flexible architecture for CNNs on FPGA | 1-gen-2016 | Meloni, Paolo; Deriu, Gianfranco; Conti, Francesco; Loi, Igor; Raffo, Luigi; Benini, Luca | - | Association for Computing Machinery, Inc |
| Automated Design Flow for Multi-Functional Dataflow-Based Platforms | 1-gen-2016 | Sau, Carlo; Meloni, Paolo; Raffo, Luigi; Palumbo, Francesca; Bezati, E; Casale Brunet, S; Mattavelli, M. | JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL, IMAGE, AND VIDEO TECHNOLOGY | - |
| Real-time neural signals decoding onto off-the-shelf DSP processors for neuroprosthetic applications | 1-gen-2016 | Pani, Danilo; Barabino, Gianluca; Citi, Luca; Meloni, Paolo; Raspopovic, Stanisa; Micera, Silvestro; Raffo, Luigi | IEEE TRANSACTIONS ON NEURAL SYSTEMS AND REHABILITATION ENGINEERING | - |
| MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation | 1-gen-2016 | Meloni, Paolo; Palumbo, Francesca; Rubattu, Claudio; Tuveri, Giuseppe; Pani, Danilo; Raffo, Luigi | MICROPROCESSORS AND MICROSYSTEMS | - |
| On-the-fly adaptivity for process networks over shared-memory platforms | 1-gen-2016 | Tuveri, Giuseppe; Meloni, Paolo; Palumbo, Francesca; Pietro Seu, Giovanni; Loi, Igor; Conti, Francesco; Raffo, Luigi | MICROPROCESSORS AND MICROSYSTEMS | - |
| SS-design: Dataflow-based design of coarse-grained: Reconfigurable platforms reconfigurable platform composer tool project - Extended abstract | 1-gen-2016 | Palumbo, Francesca; Sau, Carlo; Fanni, Tiziana; Meloni, Paolo; Raffo, Luigi | - | Institute of Electrical and Electronics Engineers Inc. |
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