PathTracing: Raising the level of understanding of processing latency in heterogeneous MPSoCs

Rubattu C.;Palumbo F.;Bhattacharyya S.;Pelcat M.

2021-01-01

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Abstract

Understanding and predicting response time is a major concern in most systems. However, the complexity of heterogeneous Multiprocessor Systems-on-Chipss (MPSoCss) makes it difficult to provide early evaluation of system execution latency when executing parallel applications. In particular, knowledge about the factors that determine latency is a must in order to effectively drive system-level scheduling and applicative design decisions. In this paper, we aim at demonstrating that a novel knowledge level is required for analyzing the key factors that influence system execution latency. For that purpose, we propose the concept of Jaccard Gantt similarity score and demonstrate that the straightforward method consisting in scheduling a Directed Acyclic Graph (DAG) of tasks, each with a Deterministic Actor Execution Time (DAET) set from individual task characterization, leads to low Jaccard Gantt similarity scores. We thus propose a new level of system analysis, called PathTracing, that relies on an evaluation of the application critical path and on an analysis of the interferences caused both by scheduling and by architectural costs.