Current Position: Francesca Palumbo is Associate Professor in Electronic at the Università degli Studi di Cagliari

Email: francesca.palumbo@unica.it

Address: Via Marengo 3, 09123 Cagliari

Research Area: IINF-01/A

Academic education:

• PhD in Electronic Engineering and Computer Science, University of Cagliari (Cagliari, Italy) October 2006 – March 2010 Thesis title: “Communication-Centric Approach to Multi-Processors System on Chip Design: Interconnection Networks Design and Evaluation"
• Master Advanced in Embedded System Design, Advanced Learning and Research Institute, University of Lugano (Lugano, Switzerland), September 2005 – July 2006           Thesis title: “Power Analysis Attacks: current possibilities and future prospective”
• Master of Science in Electronic Engineering, University of Cagliari (Cagliari, Italy), September 2003 – April 2005 Thesis title: “HDL modelling, implementation on silicon and power dissipation evaluation of Network-on-Chip modules”
• Bachelor in Electronic Engineering, University of Cagliari (Cagliari, Italy), September 1999 – October 2003 Thesis title: “Studio e implementazione su DSP TMS320VC5402 di un filtro per la rivelazione di un segnale vocale nascosto da intenso rumore di fondo “

Short CV: The primary research focus of Prof. Palumbo is on embedded, cyber-physical, and reconfigurable systems, as well as code generation tools and design automation strategies for advanced reconfigurable hardware architectures. She has over 80 Scopus indexed publications in refereed international journals and conference proceedings. In addition, she has served on 60+ Technical Committees of international conferences and organized 20+ different international conferences/schools, covering also roles such as Program Chair and General Chair. She is a member of HiPEAC, has been elevated to the Senior Grade within IEEE, and is a member of ACM and the SIE (Italian Society of Electronics). She is also a permanent Steering Committee Member of the ACM Conference on Computing Frontiers and Associate Editor of the IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems, the IEEE Embedded Systems Letters, and the Springer Journal of Signal Processing Systems. In 2018, she joined the IEEE VLSI Systems Applications Technical Committee (VSA-TC). She participated in different EU projects, and she is currently the Scientific Coordinator of the MYRTUS project on cognitive continuum computing technologies. Finally, since 2017, she has been the Director of the CPS Summer School "Designing Cyber-Physical Systems – From concepts to implementation," now in its seventh edition.

National and Regional Projects:

• 2018 – 2020 "PROSSIMO - PROgettazione, Sviluppo e ottimizzazione di Sistemi Intelligenti Multi Oggetto", Region of Sardinia – Cluster Top Down
• 2007 – 2012 "RPCT - Reconfigurable Platform Composer Tool", Region of Sardinia – LR 7
• 2007 – 2012 "ALBA - Elaborazione riconfigurabile a bassa dissipazione di potenza per digital signal processing", FAR project, D.LGS. 297/1999 – MIUR

International Projects:

• 2024 – 2026 "MYRTUS - Multi-layer 360° dYnamic orchestration and interopeRable design environmenT for compute-continUum Systems", HORIZON-CL4-2023-DATA-01-04 [Scientific Coordinator]
• 2023 – 2024 "SECURED - Scaling Up secure Processing, Anonymization and generation of Health Data for EU cross-border collaborative research and Innovation", HORIZON-HLTH-2022-IND-13
• 2021 – 2024 "IMOCO4.E - Intelligent Motion Control under Industry 4.E", ECSEL-2020-2-RIA
• 2021 – 2024 "AIDOaRt - AI-augmented automation supporting modeling, coding, testing, monitoring, and continuous development in Cyber-Physical Systems", ECSEL-2020-2-RIA
• 2019 – 2022 "Comp4Drones - Framework of key enabling technologies for safe and autonomous drones’ applications", ECSEL-2018-2-RIA [National coordinator]
• 2018 – 2021 "FITOPTIVIS - From the cloud to the edge: smart IntegraTion and OPtimization Technologies for highly efficient Image and VIdeo processing Systems", ECSEL-2017-2 - RIA
• 2018 – 2020 "ALOHA - software framework for runtime-Adaptive and secure deep Learning On Heterogeneous Architectures", ICT-05-2017 - Customised and low energy computing [Dissemination Manager]
• 2017 – 2020 "CERBERO -  Cross-layer modEl-based fRamework for multi-oBjective dEsign of Reconfigurable systems in unceRtain hybRid envirOnments", ICT-01-2016 - Smart Cyber-Physical Systems [Scientific coordinator ]
• 2010 – 2013 "MADNESS - Methods for predictAble Design of heterogeNeous Embedded System with adaptivity and reliability support", EU-FP7
• 2006 – 2009 "SHAPES - Scalable Software Hardware Architecture Platform for Embedded Systems", EU-FP6

Recent Key Partnerships:

• Abinsula, https://abinsula.com/: 5 projects and 4 publications.
• Aitek, https://www.aitek.it/en/: 2 projects and 1 publication.
• IBM Research - Haifa, https://research.ibm.com/haifa/index.shtml: 2 projects and 6 publications.
• Institut National des sciences appliquées - Institut d’Electronique et des Technologies du numérique, https://www.insa-rennes.fr/en/research/enlaboratories/ietr-insa.html: 1 project, 1 co-supervised PhD, and 13 publications.
• TNO, https://www.tno.nl/en/: 1 project.
• Universidad Politécnica de Madrid - Centro de Electrónica Industrial, http://www.cei.upm.es/, and Centro de Investigación en Tecnologías Software y Sistemas Multimedia para la Sostenibilidad, http://www.cei.upm.es/: 2 projects and 7 publications. 
• Università della Svizzera Italiana, https://www.usi.ch/en: 3 projects and 4 publications.
• University of Maryland - Department of Electrical and Computer Engineering, https://academiccatalog.umd.edu/undergraduate/colleges-schools/engineering/electrical-and-computer/: 5 publications.

Awards

• BEST PAPER AWARD – P. Meloni, G. Tuveri, D. Pani, L. Raffo, F. Palumbo, “Exploring custom heterogeneous MPSoCs for real-time neural signal decoding”, Conference on Design and Architectures for Signal and Image Processing (DASP 2015), 2015
• BEST PAPER AWARD – F. Palumbo, N. Carta, L. Raffo, “The Multi-Dataflow Composer tool: a runtime reconfigurable platform composer”, Conference on Design and Architectures for Signal and Image Processing (DASP 2011), 2011